On Mon, Nov 9, 2020 at 1:26 PM Vidya Sagar <vid...@nvidia.com> wrote: > > DesignWare core has a TLP digest (TD) override bit in one of the control > registers of ATU. This bit also needs to be programmed for proper ECRC > functionality. This is currently identified as an issue with DesignWare > IP version 4.90a. > > Signed-off-by: Vidya Sagar <vid...@nvidia.com> > --- > drivers/pci/controller/dwc/pcie-designware.c | 50 ++++++++++++++++++-- > drivers/pci/controller/dwc/pcie-designware.h | 1 + > 2 files changed, 47 insertions(+), 4 deletions(-)
Reviewed-by: Rob Herring <r...@kernel.org>
