With the newly added configurable clock options, the audio CODEC can
configure the mclk automatically.  Add the reference to the versaclock.
Since the devices on I2C5 can communicate at 400KHz, let's also increase
that too

Signed-off-by: Adam Ford <[email protected]>
---
 arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi 
b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index ee7809e8db07..130993b1b20a 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -424,13 +424,15 @@ &i2c0 {
 
 &i2c5 {
        status = "okay";
-       clock-frequency = <100000>;
+       clock-frequency = <400000>;
        pinctrl-0 = <&i2c5_pins>;
        pinctrl-names = "default";
 
        codec: wm8962@1a {
                compatible = "wlf,wm8962";
                reg = <0x1a>;
+               clocks = <&versaclock6_bb 3>;
+               clock-names = "mclk";
                DCVDD-supply = <&reg_audio>;
                DBVDD-supply = <&reg_audio>;
                AVDD-supply = <&reg_audio>;
-- 
2.25.1

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