Hi Claudiu,
Am 2021-01-21 10:19, schrieb claudiu.bez...@microchip.com:
On 20.01.2021 21:43, Michael Walle wrote:
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If the MII interface is used, the PHY is the clock master, thus don't
set the clock rate. On Zynq-7000, this will prevent the following
warning:
macb e000b000.ethernet eth0: unable to generate target frequency:
25000000 Hz
Since in this case the PHY provides the TX clock and it provides the
proper
rate based on link speed, the MACB driver should not handle the
bp->tx_clk
at all (MACB driver uses this clock only for setting the proper rate on
it
based on link speed). So, I believe the proper fix would be to not pass
the
tx_clk at all in device tree. This clock is optional for MACB driver.
Thanks for looking into this.
I had the same thought. But shouldn't the driver handle this case
gracefully?
I mean it does know that the clock isn't needed at all. Ususually that
clock
is defined in a device tree include. So you'd have to redefine that node
in
an actual board file which means duplicating the other clocks.
-michael
