Hi, Sieng, On 12/8/20 3:57 AM, Sieng Piaw Liew wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Enable 4-bit Block Protect support for MX256405D and its variants using > the same ID. > > Tested on Innacom W3400V6 router with MX25L6406E chip. > https://github.com/openwrt/openwrt/pull/3501 > > Signed-off-by: Sieng Piaw Liew <liew.s.p...@gmail.com> > --- > Changes in v2: > - Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required. > > drivers/mtd/spi-nor/macronix.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c > index 9203abaac229..033ede381673 100644 > --- a/drivers/mtd/spi-nor/macronix.c > +++ b/drivers/mtd/spi-nor/macronix.c > @@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = { > { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, > { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, > { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, > - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, > + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, > + SECT_4K | SPI_NOR_HAS_LOCK | > + SPI_NOR_4BIT_BP) },
I've read again the datasheet[1], and to me it looks like we don't support the locking scheme for this flash. What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit). The problem that I see is that mx25l6405d uses some kind of twisted TB bit. For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet states that the lower half blocks are protected (0th-63th), while in our code we would expect that just the lower first two blocks to be protected (0th and 1st). We need new support for this flash. Cheers, ta [1] https://www.macronix.com/Lists/Datasheet/Attachments/7309/MX25L6405D,%203V,%2064Mb,%20v1.5.pdf > { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) }, > { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64, > SECT_4K | SPI_NOR_DUAL_READ | > -- > 2.17.1 >