Am 2021-01-23 13:18, schrieb [email protected]:
Hi, Sieng,
On 12/8/20 3:57 AM, Sieng Piaw Liew wrote:
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Enable 4-bit Block Protect support for MX256405D and its variants
using
the same ID.
Tested on Innacom W3400V6 router with MX25L6406E chip.
MX25L6406E?
https://github.com/openwrt/openwrt/pull/3501
Signed-off-by: Sieng Piaw Liew <[email protected]>
---
Changes in v2:
- Add SPI_NOR_HAS_LOCK which SPI_NOR_4BIT_BP required.
drivers/mtd/spi-nor/macronix.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/macronix.c
b/drivers/mtd/spi-nor/macronix.c
index 9203abaac229..033ede381673 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -42,7 +42,9 @@ static const struct flash_info macronix_parts[] = {
{ "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
{ "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
- { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
+ { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128,
+ SECT_4K | SPI_NOR_HAS_LOCK |
+ SPI_NOR_4BIT_BP) },
I've read again the datasheet[1], and to me it looks like we
don't support the locking scheme for this flash.
What mx25l6405d calls BP3, we refer to as Top/Bottom support (TB bit).
The problem that I see is that mx25l6405d uses some kind of twisted
TB bit.
For example, for BP3=1, BP2=0, BP1=0, BP0=1, the flash's datasheet
states that the lower half blocks are protected (0th-63th), while in
our code we would expect that just the lower first two blocks to be
protected (0th and 1st). We need new support for this flash.
I double checked that and we don't support this. BP3 is indeed some
kind of TB bit. But not the TB bit which is currently supported. I
guess with the current code, protection scheme can be supported iff
BP3 == 0.
-michael
