Hi, Baruch,
> -----Original Message-----
> From: Baruch Siach <bar...@tkos.co.il>
> Sent: Wednesday, February 3, 2021 15:59
> To: Kostya Porotchkin <kos...@marvell.com>
> Cc: linux-kernel@vger.kernel.org; devicet...@vger.kernel.org;
> and...@lunn.ch; j...@semihalf.com; gregory.clem...@bootlin.com;
> li...@armlinux.org.uk; Nadav Haklai <nad...@marvell.com>;
> robh...@kernel.org; Stefan Chulski <stef...@marvell.com>;
> m...@semihalf.com; Ben Peled <bpe...@marvell.com>;
> sebastian.hesselba...@gmail.com; linux-arm-ker...@lists.infradead.org
> Subject: [EXT] Re: [PATCH 02/11] dts: mvebu: Update A8K AP806 SDHCI
> settings
>
> External Email
>
> ----------------------------------------------------------------------
> Hi Konstantin,
>
> On Wed, Feb 03 2021, kos...@marvell.com wrote:
> > From: Konstantin Porotchkin <kos...@marvell.com>
> >
> > Update the settings for AP806 SDHCI interface according to latest
> > Xenon drivers changes.
> > - no need to select the PHY slow mode anymore
>
> Why? Has anything changed since the introduction of marvell,xenon-phy-slow-
> mode?
[KP] AP806 B0, AP807 and later do not need the "slow mode" set by the default.
The HWE-7296210 errata is not applicable to these components and they are able
to run AP SDHCI in HS400 8-bit mode.
Kosta
>
> baruch
>
> > - * Not stable in HS modes - phy needs "more calibration", so add
> > - * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
> > - */
> > - marvell,xenon-phy-slow-mode;
> > no-1-8-v;
> > no-sd;
> > no-sdio;
> > diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > index 12e477f1aeb9..edd6131a0587 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > @@ -257,7 +257,6 @@
> > clock-names = "core";
> > clocks = <&ap_clk 4>;
> > dma-coherent;
> > - marvell,xenon-phy-slow-mode;
> > status = "disabled";
> > };
>
>
> --
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