[PATCH] arm64: dts: exynos: re-order Slim SSS clocks to match dtschema

[Krzysztof Kozlowski]

The dtschema expects pclk (APB clock) followed by aclk (AXI/AHB clock):

  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:0: 'pclk' was expected
  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
    slim-sss@11140000: clock-names:1: 'aclk' was expected

Signed-off-by: Krzysztof Kozlowski <k...@kernel.org>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 6433f9ee35e1..18a912eee360 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -564,9 +564,9 @@ slim_sss: slim-sss@11140000 {
                        compatible = "samsung,exynos5433-slim-sss";
                        reg = <0x11140000 0x1000>;
                        interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-names = "aclk", "pclk";
-                       clocks = <&cmu_imem CLK_ACLK_SLIMSSS>,
-                                <&cmu_imem CLK_PCLK_SLIMSSS>;
+                       clock-names = "pclk", "aclk";
+                       clocks = <&cmu_imem CLK_PCLK_SLIMSSS>,
+                                <&cmu_imem CLK_ACLK_SLIMSSS>;
                };
 
                pd_gscl: power-domain@105c4000 {
-- 
2.25.1