On 2/21/21 10:56 AM, Chang S. Bae wrote: > "xstate.disable=0x60000" will disable AMX on a system that has AMX compiled > into XFEATURE_MASK_USER_ENABLED. > > "xstate.enable=0x60000" will enable AMX on a system that does NOT have AMX > compiled into XFEATURE_MASK_USER_ENABLED (assuming the kernel is new enough > to support this feature). > > Rename XFEATURE_MASK_USER_SUPPORTED to XFEATURE_MASK_USER_ENABLED to be > aligned with the new parameters. > > While this cmdline is currently enabled only for AMX, it is intended to be > easily enabled to be useful for future XSAVE-enabled features. >
Hi, Can we tell people (in this Doc file) where to look up the values that can be used in xstate.enable and xstate.disable? thanks. > Signed-off-by: Chang S. Bae <chang.seok....@intel.com> > Reviewed-by: Len Brown <len.br...@intel.com> > Cc: x...@kernel.org > Cc: linux-...@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > --- > Changes from v3: > * Fixed a few typos. (Randy Dunlap) > > Changes from v2: > * Changed the kernel tainted when any unknown state is enabled. (Andy > Lutomirski) > * Simplified the cmdline handling. > * Edited the changelog. > > Changes from v1: > * Renamed the user state mask define (Andy Lutomirski and Dave Hansen) > * Changed the error message (Dave Hansen) > * Fixed xfeatures_mask_user() > * Rebased the upstream kernel (5.10) -- revived the param parse function > --- > .../admin-guide/kernel-parameters.txt | 15 +++++ > arch/x86/include/asm/fpu/types.h | 6 ++ > arch/x86/include/asm/fpu/xstate.h | 24 +++---- > arch/x86/kernel/fpu/init.c | 65 +++++++++++++++++-- > 4 files changed, 93 insertions(+), 17 deletions(-) > > diff --git a/Documentation/admin-guide/kernel-parameters.txt > b/Documentation/admin-guide/kernel-parameters.txt > index a10b545c2070..ec79f63979a4 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -6014,6 +6014,21 @@ > which allow the hypervisor to 'idle' the guest on lock > contention. > > + xstate.enable= [X86-64] > + xstate.disable= [X86-64] > + The kernel is compiled with a default xstate bitmask -- > + enabling it to use the XSAVE hardware to efficiently > + save and restore thread states on context switch. > + xstate.enable allows adding to that default mask at > + boot-time without recompiling the kernel just to support > + the new thread state. (Note that the kernel will ignore > + any bits in the mask that do not correspond to features > + that are actually available in CPUID.) xstate.disable > + allows clearing bits in the default mask, forcing the > + kernel to forget that it supports the specified thread > + state. When a bit set for both, the kernel takes > + xstate.disable as a priority. > + > xirc2ps_cs= [NET,PCMCIA] > Format: > > <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] -- ~Randy
