This will be required to support the modem.

Signed-off-by: Konrad Dybcio <konrad.dyb...@somainline.org>
---
 drivers/clk/qcom/gcc-msm8994.c               | 1 +
 include/dt-bindings/clock/qcom,gcc-msm8994.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/clk/qcom/gcc-msm8994.c b/drivers/clk/qcom/gcc-msm8994.c
index e1e40982ebee..fae784b4242f 100644
--- a/drivers/clk/qcom/gcc-msm8994.c
+++ b/drivers/clk/qcom/gcc-msm8994.c
@@ -2693,6 +2693,7 @@ static struct gdsc *gcc_msm8994_gdscs[] = {
 static const struct qcom_reset_map gcc_msm8994_resets[] = {
        [USB3_PHY_RESET] = { 0x1400 },
        [USB3PHY_PHY_RESET] = { 0x1404 },
+       [MSS_RESET] = { 0x1680 },
        [PCIE_PHY_0_RESET] = { 0x1b18 },
        [PCIE_PHY_1_RESET] = { 0x1b98 },
        [QUSB2_PHY_RESET] = { 0x04b8 },
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8994.h 
b/include/dt-bindings/clock/qcom,gcc-msm8994.h
index dcb49817dcec..f6836f430bb5 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8994.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8994.h
@@ -174,5 +174,6 @@
 #define PCIE_PHY_0_RESET               2
 #define PCIE_PHY_1_RESET               3
 #define QUSB2_PHY_RESET                        4
+#define MSS_RESET                              5
 
 #endif
-- 
2.30.2

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