Both 1.8v and 3.3v power supplies can be feeded to i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0.

Signed-off-by: Richard Zhu <hongxing....@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts 
b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 85b045253a0e..30bcf5f583e0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -318,6 +318,7 @@
                 <&clk IMX8MQ_CLK_PCIE1_PHY>,
                 <&pcie0_refclk>;
        clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+       pcie-vph-3v3;
        status = "okay";
 };
 
-- 
2.17.1

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