> -----Original Message-----
> From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
> Sent: Thursday, April 1, 2021 12:05 AM
> To: Andy Shevchenko <andriy.shevche...@linux.intel.com>; Serge Semin
> <sergey.se...@baikalelectronics.ru>; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Cc: Jarkko Nikula <jarkko.nik...@linux.intel.com>; Mika Westerberg
> <mika.westerb...@linux.intel.com>; w...@kernel.org; yangyicong
> <yangyic...@huawei.com>; Song Bao Hua (Barry Song)
> <song.bao....@hisilicon.com>
> Subject: [PATCH v1 1/1] i2c: designware: Adjust bus_freq_hz when refuse high
> speed mode set
>
> When hardware doesn't support High Speed Mode, we forget bus_freq_hz
> timing adjustment. This makes the timings and real registers being
> unsynchronized. Adjust bus_freq_hz when refuse high speed mode set.
>
> Fixes: b6e67145f149 ("i2c: designware: Enable high speed mode")
> Reported-by: "Song Bao Hua (Barry Song)" <song.bao....@hisilicon.com>
> Signed-off-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
> ---
Thanks for fixing that.
Reviewed-by: Barry Song <song.bao....@hisilicon.com>
> drivers/i2c/busses/i2c-designware-master.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/i2c/busses/i2c-designware-master.c
> b/drivers/i2c/busses/i2c-designware-master.c
> index 34bb4e21bcc3..9bfa06e31eec 100644
> --- a/drivers/i2c/busses/i2c-designware-master.c
> +++ b/drivers/i2c/busses/i2c-designware-master.c
> @@ -129,6 +129,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev
> *dev)
> if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
> != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
> dev_err(dev->dev, "High Speed not supported!\n");
> + t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
> dev->master_cfg &= ~DW_IC_CON_SPEED_MASK;
> dev->master_cfg |= DW_IC_CON_SPEED_FAST;
> dev->hs_hcnt = 0;
> --
> 2.30.2
