[PATCH 2/2] drm/vc4: hdmi: Convert to the new clock request API

[Maxime Ripard]

The new clock request API allows us to increase the rate of the HSM
clock to match our pixel rate requirements while decreasing it when
we're done, resulting in a better power-efficiency.

Signed-off-by: Maxime Ripard <max...@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hdmi.c | 19 ++++++++++++-------
 drivers/gpu/drm/vc4/vc4_hdmi.h |  3 +++
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 1fda574579af..244053de6150 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -473,7 +473,9 @@ static void vc4_hdmi_encoder_post_crtc_powerdown(struct 
drm_encoder *encoder,
                   HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
 
        clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock);
+       clk_request_done(vc4_hdmi->bvb_req);
        clk_disable_unprepare(vc4_hdmi->hsm_clock);
+       clk_request_done(vc4_hdmi->hsm_req);
        clk_disable_unprepare(vc4_hdmi->pixel_clock);
 
        ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
@@ -778,9 +780,9 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct 
drm_encoder *encoder,
         * pixel clock, but HSM ends up being the limiting factor.
         */
        hsm_rate = max_t(unsigned long, 120000000, (pixel_rate / 100) * 101);
-       ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate);
-       if (ret) {
-               DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
+       vc4_hdmi->hsm_req = clk_request_start(vc4_hdmi->hsm_clock, hsm_rate);
+       if (IS_ERR(vc4_hdmi->hsm_req)) {
+               DRM_ERROR("Failed to set HSM clock rate: %ld\n", 
PTR_ERR(vc4_hdmi->hsm_req));
                return;
        }
 
@@ -797,10 +799,11 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct 
drm_encoder *encoder,
         * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
         * at 300MHz.
         */
-       ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock,
-                              (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 
75000000));
-       if (ret) {
-               DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
+       vc4_hdmi->bvb_req = clk_request_start(vc4_hdmi->pixel_bvb_clock,
+                                             (hsm_rate > VC4_HSM_MID_CLOCK ? 
150000000 : 75000000));
+       if (IS_ERR(vc4_hdmi->bvb_req)) {
+               DRM_ERROR("Failed to set pixel bvb clock rate: %ld\n", 
PTR_ERR(vc4_hdmi->bvb_req));
+               clk_request_done(vc4_hdmi->hsm_req);
                clk_disable_unprepare(vc4_hdmi->hsm_clock);
                clk_disable_unprepare(vc4_hdmi->pixel_clock);
                return;
@@ -809,6 +812,8 @@ static void vc4_hdmi_encoder_pre_crtc_configure(struct 
drm_encoder *encoder,
        ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock);
        if (ret) {
                DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret);
+               clk_request_done(vc4_hdmi->bvb_req);
+               clk_request_done(vc4_hdmi->hsm_req);
                clk_disable_unprepare(vc4_hdmi->hsm_clock);
                clk_disable_unprepare(vc4_hdmi->pixel_clock);
                return;
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
index 3cebd1fd00fc..9ac4a2c751df 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
@@ -167,6 +167,9 @@ struct vc4_hdmi {
 
        struct reset_control *reset;
 
+       struct clk_request *bvb_req;
+       struct clk_request *hsm_req;
+
        struct debugfs_regset32 hdmi_regset;
        struct debugfs_regset32 hd_regset;
 };
-- 
2.30.2