On 4/15/21 12:10 PM, Alexandre Torgue wrote:
> Prevent warning seen with "make dtbs_check W=1" command:
>
> Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary
> address-cells/size-cells without "ranges" or child "reg" property
>
> Signed-off-by: Alexandre Torgue <alexandre.tor...@foss.st.com>
Hi Alexandre,
Reviewed-by: Fabrice Gasnier <fabrice.gasn...@foss.st.com>
Thanks,
Fabrice
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi
> b/arch/arm/boot/dts/stm32f429.dtsi
> index 41e0087bdbf9..8748d5850298 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -283,8 +283,6 @@
> };
>
> timers13: timers@40001c00 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40001C00 0x400>;
> clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
> @@ -299,8 +297,6 @@
> };
>
> timers14: timers@40002000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40002000 0x400>;
> clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
> @@ -633,8 +629,6 @@
> };
>
> timers10: timers@40014400 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40014400 0x400>;
> clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
> @@ -649,8 +643,6 @@
> };
>
> timers11: timers@40014800 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40014800 0x400>;
> clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi
> b/arch/arm/boot/dts/stm32f746.dtsi
> index e1df603fc981..72c1b76684b6 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -265,8 +265,6 @@
> };
>
> timers13: timers@40001c00 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40001C00 0x400>;
> clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
> @@ -281,8 +279,6 @@
> };
>
> timers14: timers@40002000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40002000 0x400>;
> clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
> @@ -531,8 +527,6 @@
> };
>
> timers10: timers@40014400 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40014400 0x400>;
> clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
> @@ -547,8 +541,6 @@
> };
>
> timers11: timers@40014800 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-timers";
> reg = <0x40014800 0x400>;
> clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
> diff --git a/arch/arm/boot/dts/stm32h743.dtsi
> b/arch/arm/boot/dts/stm32h743.dtsi
> index 05ecdf9ff03a..6e42ca2dada2 100644
> --- a/arch/arm/boot/dts/stm32h743.dtsi
> +++ b/arch/arm/boot/dts/stm32h743.dtsi
> @@ -485,8 +485,6 @@
> };
>
> lptimer4: timer@58002c00 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-lptimer";
> reg = <0x58002c00 0x400>;
> clocks = <&rcc LPTIM4_CK>;
> @@ -501,8 +499,6 @@
> };
>
> lptimer5: timer@58003000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> compatible = "st,stm32-lptimer";
> reg = <0x58003000 0x400>;
> clocks = <&rcc LPTIM5_CK>;
>
