On Mon, Dec 08, 2025 at 04:25:33PM +0400, George Moussalem via B4 Relay wrote: > From: Manikanta Mylavarapu <[email protected]> > > IPQ5332 security software running under trustzone requires metadata size. > With new command support added in TrustZone that includes a size parameter, > pass metadata size as well. > > Reviewed-by: Konrad Dybcio <[email protected]> > Signed-off-by: Manikanta Mylavarapu <[email protected]> > Signed-off-by: Gokul Sriram Palanisamy <[email protected]> > --- > drivers/firmware/qcom/qcom_scm.c | 17 +++++++++++++---- > drivers/firmware/qcom/qcom_scm.h | 1 + > 2 files changed, 14 insertions(+), 4 deletions(-) > > diff --git a/drivers/firmware/qcom/qcom_scm.c > b/drivers/firmware/qcom/qcom_scm.c > index > 1a6f85e463e06a12814614cea20719c90a371b69..c970157f75b51027fb73664a58c38550344ab963 > 100644 > --- a/drivers/firmware/qcom/qcom_scm.c > +++ b/drivers/firmware/qcom/qcom_scm.c > @@ -583,9 +583,6 @@ int qcom_scm_pas_init_image(u32 peripheral, const void > *metadata, size_t size, > int ret; > struct qcom_scm_desc desc = { > .svc = QCOM_SCM_SVC_PIL, > - .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE, > - .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW), > - .args[0] = peripheral, > .owner = ARM_SMCCC_OWNER_SIP, > }; > struct qcom_scm_res res; > @@ -617,7 +614,19 @@ int qcom_scm_pas_init_image(u32 peripheral, const void > *metadata, size_t size, > if (ret) > goto disable_clk; > > - desc.args[1] = mdata_phys; > + if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, > + QCOM_SCM_PIL_PAS_INIT_IMAGE_V2)) { > + desc.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE_V2; > + desc.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, > QCOM_SCM_VAL); > + desc.args[0] = peripheral; > + desc.args[1] = mdata_phys; > + desc.args[2] = size; > + } else { > + desc.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE; > + desc.arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW); > + desc.args[0] = peripheral; > + desc.args[1] = mdata_phys; > + } > > ret = qcom_scm_call(__scm->dev, &desc, &res); > qcom_scm_bw_disable(); > diff --git a/drivers/firmware/qcom/qcom_scm.h > b/drivers/firmware/qcom/qcom_scm.h > index > a56c8212cc0c41021e5a067d52b7d5dcc49107ea..b8e5b4f2498e75c9eca1a0c0032254b7126b9ed3 > 100644 > --- a/drivers/firmware/qcom/qcom_scm.h > +++ b/drivers/firmware/qcom/qcom_scm.h > @@ -100,6 +100,7 @@ int qcom_scm_shm_bridge_enable(struct device *scm_dev); > > #define QCOM_SCM_SVC_PIL 0x02 > #define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01 > +#define QCOM_SCM_PIL_PAS_INIT_IMAGE_V2 0x1a
Please keep these defines sorted (QCOM_SCM_PIL_PAS_INIT_IMAGE_V2 should come after QCOM_SCM_PIL_PAS_MSS_RESET). > #define QCOM_SCM_PIL_PAS_MEM_SETUP 0x02 > #define QCOM_SCM_PIL_PAS_AUTH_AND_RESET 0x05 > #define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06 > > -- > 2.52.0 > > -- With best wishes Dmitry
