Hi Mark,

On 1/6/26 16:35, Mark Brown wrote:
> On an aarch64 only system the 32 bit ID registers have UNDEFINED values.
> As a result set_id_regs skips tests for setting fields in these registers
> when testing an aarch64 only guest. This has the side effect of meaning
> that we don't record an expected value for these registers, meaning that
> when the subsequent tests for values being visible in guests and preserved
> over reset check the value they can spuriously fail. This can be seen by
> running on an emulated system with both NV and 32 bit enabled, NV will
> result in the guests created by the test program being 64 bit only but
> the 32 bit ID registers will have values.
> 
> Also skip those tests that use the values set in the field setting tests
> for aarch64 only guests in order to avoid these spurious failures.
> 
> Signed-off-by: Mark Brown <[email protected]>
> ---
>  tools/testing/selftests/kvm/arm64/set_id_regs.c | 49 
> ++++++++++++++++++-------
>  1 file changed, 36 insertions(+), 13 deletions(-)
> 
> diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c 
> b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> index 5837da63e9b9..908b3c8947d9 100644
> --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c
> +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c
> @@ -295,6 +295,13 @@ static const char *get_reg_name(u64 id)
>       }
>  }
>  
> +static inline bool is_aarch32_id_reg(u64 id)
> +{
> +     return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
> +             sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
> +             sys_reg_CRm(id) <= 3);
> +}
> +

This check looks correct to me now.

Not touched in this patch but the check for aarch64_only looks suspect to me.

>From main()
val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1));
el0 = FIELD_GET(ID_AA64PFR0_EL1_EL0, val);
aarch64_only = (el0 == ID_AA64PFR0_EL1_EL0_IMP);

As we are concerned with system registers that are accessible from EL1 and 
higher
should this not be checking ID_AA64PFR0_EL1_EL1 rather than ID_AA64PFR0_EL1_EL0?
Not sure if it makes sense for the two to be different though.

Thanks,

Ben


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