On Wed, Jan 07, 2026 at 09:54:58AM +0000, Ben Horgan wrote: > Not touched in this patch but the check for aarch64_only looks suspect to me.
> From main() > val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1)); > el0 = FIELD_GET(ID_AA64PFR0_EL1_EL0, val); > aarch64_only = (el0 == ID_AA64PFR0_EL1_EL0_IMP); > As we are concerned with system registers that are accessible from EL1 and > higher > should this not be checking ID_AA64PFR0_EL1_EL1 rather than > ID_AA64PFR0_EL1_EL0? > Not sure if it makes sense for the two to be different though. The affected registers are ID registers so they're always physically readable, the entire ID space is always accessible (the otherwise unspecified registers read as zero), and if you think about it for a system with AArch32 only at EL0 you still need to know what the EL0 features are from EL1. Like you say it's a preexisting thing either way.
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