The CAMSS_TOP_GDSC inside camcc requires an interconnect path to be enabled, otherwise the GDSC will be stuck on 'off' and can't be enabled.
Add the interconnect path so that this requirement can be satisfied by the kernel. Signed-off-by: Luca Weiss <[email protected]> --- arch/arm64/boot/dts/qcom/milos.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi index 0f69deabb60c..58b4c2966df1 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -1660,6 +1660,9 @@ camcc: clock-controller@adb0000 { <&sleep_clk>, <&gcc GCC_CAMERA_AHB_CLK>; + interconnects = <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS + &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ALWAYS>; + #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; -- 2.52.0
