On Sun, Mar 08, 2026 at 01:39:29AM +0100, Aelin Reidel wrote:
> Add support for the global clock controller found on Fillmore (e.g. SM7450)
> based devices.
>
> Signed-off-by: Aelin Reidel <[email protected]>
> ---
> drivers/clk/qcom/Kconfig | 9 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/gcc-fillmore.c | 2714
> +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 2724 insertions(+)
>
> +
> +static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = {
> + .reg = 0x7b060,
> + .shift = 0,
> + .width = 2,
> + .parent_map = gcc_parent_map_4,
> + .clkr = {
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_pcie_0_pipe_clk_src",
> + .parent_data = gcc_parent_data_4,
> + .num_parents = ARRAY_SIZE(gcc_parent_data_4),
> + .ops = &clk_regmap_mux_closest_ops,
clk_regmap_phy_mux, &clk_regmap_phy_mux_ops,
> + },
> + },
> +};
> +
> +static struct clk_regmap_mux gcc_ufs_phy_rx_symbol_0_clk_src = {
> + .reg = 0x87060,
> + .shift = 0,
> + .width = 2,
> + .parent_map = gcc_parent_map_6,
> + .clkr = {
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_ufs_phy_rx_symbol_0_clk_src",
> + .parent_data = gcc_parent_data_6,
> + .num_parents = ARRAY_SIZE(gcc_parent_data_6),
> + .ops = &clk_regmap_mux_closest_ops,
> + },
> + },
> +};
> +
> +static struct clk_regmap_mux gcc_ufs_phy_rx_symbol_1_clk_src = {
> + .reg = 0x870d0,
> + .shift = 0,
> + .width = 2,
> + .parent_map = gcc_parent_map_7,
> + .clkr = {
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_ufs_phy_rx_symbol_1_clk_src",
> + .parent_data = gcc_parent_data_7,
> + .num_parents = ARRAY_SIZE(gcc_parent_data_7),
> + .ops = &clk_regmap_mux_closest_ops,
> + },
> + },
> +};
> +
> +static struct clk_regmap_mux gcc_ufs_phy_tx_symbol_0_clk_src = {
> + .reg = 0x87050,
> + .shift = 0,
> + .width = 2,
> + .parent_map = gcc_parent_map_8,
> + .clkr = {
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_ufs_phy_tx_symbol_0_clk_src",
> + .parent_data = gcc_parent_data_8,
> + .num_parents = ARRAY_SIZE(gcc_parent_data_8),
> + .ops = &clk_regmap_mux_closest_ops,
> + },
> + },
> +};
> +
> +static struct clk_regmap_mux gcc_usb3_prim_phy_pipe_clk_src = {
> + .reg = 0x49068,
> + .shift = 0,
> + .width = 2,
> + .parent_map = gcc_parent_map_9,
> + .clkr = {
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_usb3_prim_phy_pipe_clk_src",
> + .parent_data = gcc_parent_data_9,
> + .num_parents = ARRAY_SIZE(gcc_parent_data_9),
> + .ops = &clk_regmap_mux_closest_ops,
clk_regmap_phy_mux, &clk_regmap_phy_mux_ops,
> + },
> + },
> +};
> +
Overall this driver looks very close to SM8450 GCC driver. Is there a
chance of unifying them?
--
With best wishes
Dmitry
