On Mon, May 11, 2026 at 10:39:25AM +0800, Jiafei Pan wrote:
> Add compatible string "fsl,imx-rproc-psci" for i.MX Cortex-A Core's
> remoteproc support.
> 
> Signed-off-by: Jiafei Pan <[email protected]>
> 
> ---
> Changes in v3:
> - Fixed dt_binding_check warnings
> 
> ---
>  .../remoteproc/fsl,imx-rproc-psci.yaml        | 51 +++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc-psci.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc-psci.yaml 
> b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc-psci.yaml
> new file mode 100644
> index 000000000000..28d00dbf8bc7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc-psci.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc-psci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX Cortex-A Core Remote Processor via PSCI
> +
> +maintainers:
> +  - Jiafei Pan <[email protected]>
> +
> +description:
> +  This binding provides support for managing Cortex-A cores as remote

Describe the hardware, not the binding.

> +  processors on i.MX platforms using the PSCI (Power State Coordination
> +  Interface) for CPU power management operations. This allows single
> +  Cortex-A core or multiple Cortex-A cores to be controlled by Linux as
> +  a remote processor, enabling them to run RTOS or bare-metal applications.
> +
> +properties:
> +  compatible:
> +    const: fsl,imx-rproc-psci

Why isn't the compatible specific?

> +
> +  fsl,cpus-mask:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Bitmask indicating which CPU cores are assigned to this remote
> +      processor instance. Each bit represents a CPU core, where bit N
> +      corresponds to CPU N. For example, 0x2 (0b10) assigns CPU core 1,
> +      while 0x6 (0b110) assigns CPU cores 1 and 2.

So you partition existing Cortex-A cores? Or how exactly? Why isn't this
deducible from the compatible (I assume you read carefully writing
bindings)?

> +
> +  memory-region:
> +    maxItems: 1
> +    description:
> +      Phandle to a reserved memory region to be used for the remote
> +      processor's code and data.
> +
> +required:
> +  - compatible
> +  - fsl,cpus-mask
> +  - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +        remoteproc-ca55-1 {

Implement previous comments.

Best regards,
Krzysztof


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