On 5/25/26 8:51 AM, Taniya Das wrote:
> 
> 
> On 5/22/2026 4:18 PM, Erikas Bitovtas wrote:
>>>>>   static struct clk_branch gcc_venus0_core0_vcodec0_clk = {
>>>>>       .halt_reg = 0x4c02c,
>>>>> +    .halt_check = BRANCH_HALT_SKIP,
>>> please use .halt_check = BRANCH_HALT
>>>
>> If I do that, the clock fails to power on on boot.
>> [   20.324488] ------------[ cut here ]------------
>> [   20.324520] gcc_venus0_core0_vcodec0_clk status stuck at 'off'
>> [   20.324663] WARNING: drivers/clk/qcom/clk-branch.c:88 at
> 
> 
> I am hoping the Venus driver has enabled the GDSC before requesting the
> clock enable.
> 
It does. From 3/9:
+static int vcodec_domains_enable(struct venus_core *core)
+{
+       const struct venus_resources *res = core->res;
+       struct device *pd_dev;
+       int i = 0, ret;
+
+       if (!res->vcodec_pmdomains)
+               return 0;
+
+       for (; i < res->vcodec_pmdomains_num; i++) {
+               pd_dev = core->pmdomains->pd_devs[i];
+               ret = pm_runtime_resume_and_get(pd_dev);
+               if (ret)
+                       goto err;
+
+               ret = dev_pm_genpd_set_hwmode(pd_dev, true);
+               if (ret && ret != -EOPNOTSUPP) {
+                       pm_runtime_put_sync(pd_dev);
+                       goto err;
+               }
+       }

 static void core_put_v1(struct venus_core *core)
@@ -320,11 +410,35 @@ static int core_power_v1(struct venus_core *core,
int on)
 {
        int ret = 0;

-       if (on == POWER_ON)
+       if (on == POWER_ON) {
+               ret = vcodec_domains_enable(core);
+               if (ret)
+                       return ret;
+
                ret = core_clks_enable(core);
-       else
+               if (ret)
+                       goto fail_pmdomains;
+
+               if (!core->res->vcodec_pmdomains)
+                       return 0;
+
+               ret = vcodec_clks_enable(core, core->vcodec_clks);
+               if (ret)
+                       goto fail_core_clks;
+

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