On Thu, Jun 11, 2026 at 04:12:46PM -0400, Guodong Xu wrote: > From: Qingwei Hu <[email protected]> > > Zic64b mandates 64-byte naturally aligned cache blocks and is a > mandatory extension of the RVA22 and RVA23 profiles. Allocate a > RISCV_ISA_EXT_ZIC64B id, parse "zic64b" from the ISA string with a > validate callback that requires each cbom/cbop/cboz cache block size to > be 64 bytes when it is present, and export it through hwprobe. > > Link: > https://lists.riscv.org/g/tech-unprivileged/topic/question_about_zic64b_and/119631059 > Signed-off-by: Qingwei Hu <[email protected]> > Co-developed-by: Guodong Xu <[email protected]> > Signed-off-by: Guodong Xu <[email protected]>
> +static int riscv_ext_zic64b_validate(const struct riscv_isa_ext_data *data,
> + const unsigned long *isa_bitmap)
> +{
> + /*
> + * Zic64b mandates 64-byte naturally aligned cache blocks; cross-check
> the
> + * cbom/cbop/cboz block-size (when declared) device-tree properties to
> + * avoid inconsistency.
> + */
> + if ((riscv_cbom_block_size && riscv_cbom_block_size != 64) ||
> + (riscv_cbop_block_size && riscv_cbop_block_size != 64) ||
> + (riscv_cboz_block_size && riscv_cboz_block_size != 64)) {
> + pr_err("Zic64b detected in ISA string, disabling as a CBO block
> size is not 64 bytes\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
I'm inclined to object to this, but we don't have validation on ACPI
stuff to be able to mandate that people fill in the rhct entries.
Reviewed-by: Conor Dooley <[email protected]>
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