On Mon, 2012-12-17 at 13:39 -0600, Jacob Shin wrote:
> Currently only AMD Family 15h processors have special handling for MC2
> errors, since upcoming Family 16h will also need unique handling,
> let's make MC2 handling part of amd_decoder_ops.
[]
> diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
[]
> @@ -399,12 +399,9 @@ static void decode_mc1_mce(struct mce *m)
> pr_emerg(HW_ERR "Corrupted MC1 MCE info?\n");
> }
>
> -static void decode_mc2_mce(struct mce *m)
> +static bool k8_mc2_mce(u16 ec, u8 xec)
> {
> - u16 ec = EC(m->status);
> - u8 xec = XEC(m->status, xec_mask);
> -
> - pr_emerg(HW_ERR "MC2 Error");
> + bool ret = true;
>
> if (xec == 0x1)
> pr_cont(" in the write data buffers.\n");
It'd be better to change the pr_cont uses to pr_emerg
[]
> +static void decode_mc2_mce(struct mce *m)
> +{
> + u16 ec = EC(m->status);
> + u8 xec = XEC(m->status, xec_mask);
> +
> + pr_emerg(HW_ERR "MC2 Error: ");
Remove this and
> + if (fam_ops->mc2_mce(ec, xec))
> + ;
> + else
> + pr_emerg(HW_ERR "Corrupted MC2 MCE info?\n");
> }
And make this
if (!fam_ops->mc2_mce(ec, xec))
pr_emerg(etc...);
--
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