On Wed, 19 Dec 2012, Lee Jones wrote:
> In the case of some of the ux500 platforms, an Ethernet chip is
> placed on an extended bus which is traditionally used as a NAND
> flash chip placeholder. The p3_pclk0 clock is used to control it,
> so we are required to provide and easy way to access it from the
> SMSC911x driver. We do this using an alias provided by this patch.
>
> Cc: Mike Turquette <mturque...@linaro.org>
> Cc: Ulf Hansson <ulf.hans...@linaro.org>
> Signed-off-by: Lee Jones <lee.jo...@linaro.org>
> ---
> drivers/clk/ux500/u8500_clk.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
> index a601802..9d9add1 100644
> --- a/drivers/clk/ux500/u8500_clk.c
> +++ b/drivers/clk/ux500/u8500_clk.c
> @@ -325,6 +325,7 @@ void u8500_clk_init(void)
> clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE,
> BIT(0), 0);
> clk_register_clkdev(clk, "fsmc", NULL);
> + clk_register_clkdev(clk, NULL, "smsc911x");
>
> clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE,
> BIT(1), 0);
> --
> 1.7.9.5
>
I still need a maintiner Ack for this before I can push it.
Mike?
--
Lee Jones
Linaro ST-Ericsson Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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