On Wed, Jan 09, 2013 at 10:17:15AM +0200, Andy Shevchenko wrote:
> From: Heikki Krogerus <heikki.kroge...@linux.intel.com>
>
> The DMA transfer could not be established if previously it was paused and
> terminated. In that case the channel's suspend bit remains set that prevents
> to
> transfer anything until channel is resumed.
>
> The patch adds a code that clears the DWC_CFGL_CH_SUSP bit during termination.
No this patch calls resume to do so... Can you update the change log
>
> Signed-off-by: Heikki Krogerus <heikki.kroge...@linux.intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
> Acked-by: Viresh Kumar <viresh.ku...@linaro.org>
> ---
> drivers/dma/dw_dmac.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
> index 6a8f8c7..c6ebea1 100644
> --- a/drivers/dma/dw_dmac.c
> +++ b/drivers/dma/dw_dmac.c
> @@ -1059,7 +1059,7 @@ static int dwc_control(struct dma_chan *chan, enum
> dma_ctrl_cmd cmd,
>
> dwc_chan_disable(dw, dwc);
>
> - dwc->paused = false;
> + dwc_chan_resume(dwc);
>
> /* active_list entries will end up before queued entries */
> list_splice_init(&dwc->queue, &list);
> --
> 1.7.10.4
>
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