On Tue, Jan 15, 2013 at 9:42 PM, Aaron Sierra <[email protected]> wrote:
> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at > offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to > properly be enabled (and disabled) for these chipsets. > > Signed-off-by: Agócs Pál <[email protected]> > Signed-off-by: Aaron Sierra <[email protected]> Acked-by: Linus Walleij <[email protected]> For the GPIO parts. I honestly know very little about PCI. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
