Hi Gentleman, This update will allow to conserve interrupt resources when PCI device uses multiple-MSI mode and sends lesser power-of-two MSIs.
I have held this off for some time, since there were no such usages (at least known to me). But recently PLX Technology confirmed they do have, i.e. their new PEX8796 chip needs 18 MSIs. The series is against the tip/apic. Alexander Gordeev (2): PCI/MSI: Allocate as many multiple-MSIs as requested x86/MSI: Allocate as many multiple-MSIs as requested drivers/iommu/irq_remapping.c | 7 ++++--- drivers/pci/msi.c | 10 ++++++++-- include/linux/msi.h | 1 + 3 files changed, 13 insertions(+), 5 deletions(-) -- 1.7.7.6 -- Regards, Alexander Gordeev agord...@redhat.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
