On 17.02.2013 17:23, Mark Brown wrote: > On Sat, Feb 16, 2013 at 06:03:51PM +0100, Daniel Mack wrote: > >> The register layout is described on page 26, and they call their >> registers 'subaddresses'. Up to sub-address 0x1c, I see no problem >> mapping that to a simple 8-bit regmap layout, but above that, access >> gets trickier because registers change their sizes, which breaks the cache. > > The regmap I/O code isn't making any effort to support such devices, the > hardware is just too crazy to worry about. The best you can do is use > the no-bus support and open code your physical I/O so you can still use > the cache.
So it turns out I need to write these registers now on the TAS5086 codec, which has such a strange layout. I wonder how I can possibly open code the physical I/O with registers that are up to 20 bytes in size, while the reg_write callback in struct regmap_config assumes an unsigned int suffices for the data? Any example you can point me to? Thanks, Daniel -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
