Quoting Tushar Behera (2013-06-06 01:28:18)
> Currently 'pmu' clock is not handled by any of the drivers.
> Also before the introduction of CCF, this clock was not defined,
> hence was left enabled always.
>
> When this clock is disabled, software reset register becomes
> inaccessible and system reboot doesn't work.
>
> Upon restoring the default behaviour, system reboot starts working.
>
> Signed-off-by: Tushar Behera <[email protected]>
Taken into clk-fixes.
Thanks,
Mike
> ---
> drivers/clk/samsung/clk-exynos5250.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/samsung/clk-exynos5250.c
> b/drivers/clk/samsung/clk-exynos5250.c
> index 5c97e75..3853da9 100644
> --- a/drivers/clk/samsung/clk-exynos5250.c
> +++ b/drivers/clk/samsung/clk-exynos5250.c
> @@ -378,7 +378,7 @@ struct samsung_gate_clock exynos5250_gate_clks[]
> __initdata = {
> GATE(hsi2c3, "hsi2c3", "aclk66", GATE_IP_PERIC, 31, 0, 0),
> GATE(chipid, "chipid", "aclk66", GATE_IP_PERIS, 0, 0, 0),
> GATE(sysreg, "sysreg", "aclk66", GATE_IP_PERIS, 1, 0, 0),
> - GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, 0, 0),
> + GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED, 0),
> GATE(tzpc0, "tzpc0", "aclk66", GATE_IP_PERIS, 6, 0, 0),
> GATE(tzpc1, "tzpc1", "aclk66", GATE_IP_PERIS, 7, 0, 0),
> GATE(tzpc2, "tzpc2", "aclk66", GATE_IP_PERIS, 8, 0, 0),
> --
> 1.7.9.5
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