On 21/06/13 21:31, Rohit Vaswani wrote: > On some hardware, the timer deasserts the interrupt when a > new TVAL is written only when the enable bit is cleared. > Hence explicitly disable the timer and then program the > TVAL followed by enabling the timer. > If this order is not followed, there are chances that > you would not receive any timer interrupts. > This is done as suggested in https://lkml.org/lkml/2012/8/11/39 > > Signed-off-by: Rohit Vaswani <[email protected]> > --- > drivers/clocksource/arm_arch_timer.c | 5 +++-- > 1 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/clocksource/arm_arch_timer.c > b/drivers/clocksource/arm_arch_timer.c > index a2b2541..05ba0c2 100644 > --- a/drivers/clocksource/arm_arch_timer.c > +++ b/drivers/clocksource/arm_arch_timer.c > @@ -103,9 +103,10 @@ static inline void set_next_event(const int access, > unsigned long evt) > { > unsigned long ctrl; > ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL); > - ctrl |= ARCH_TIMER_CTRL_ENABLE; > - ctrl &= ~ARCH_TIMER_CTRL_IT_MASK; > + ctrl &= ~(ARCH_TIMER_CTRL_ENABLE | ARCH_TIMER_CTRL_IT_MASK); > + arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl); > arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt); > + ctrl |= ARCH_TIMER_CTRL_ENABLE; > arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl); > }
Maybe that would deserve a comment in the code so people don't get the idea it can be reordered to save the extra write? Other than that, and FWIW: Acked-by: Marc Zyngier <[email protected]> M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
