On Thu, 11 Jul 2013, H. Peter Anvin wrote: > > synchronization after replacing "all but first" instructions should not > > be necessary (on Intel hardware), as the syncing after the subsequent > > patching of the first byte provides enough safety. > > But there's not only Intel HW out there, and we'd rather be on a safe > > side. > > Has anyone talked to AMD or VIA about this at all? Did anyone else ever > make SMP-capable x86?
If Boris can verify for AMD, that'd be good; we could then just remove one extra syncing of the cores as a followup (can be done any time later, both for alternative.c and ftrace in fact). With the "extra" sync, the procedure is already verified to work properly by ftace. Thanks, -- Jiri Kosina SUSE Labs -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
