On Thu, Jul 11, 2013 at 02:36:38PM -0700, H. Peter Anvin wrote: > On 07/11/2013 02:04 PM, Borislav Petkov wrote: > > On Thu, Jul 11, 2013 at 01:53:16PM -0700, H. Peter Anvin wrote: > >> Has anyone talked to AMD or VIA about this at all? > > > > I guess I can try to take care of the AMD part. Just to confirm, is this > > the exact sequence we're interested in: > > > > 1. Setup int3 handler for fixup. > > > > 2. Put a breakpoint (int3) on the first byte of modifying region, and > > synchronize code on all CPUs. > > > > 3. Modify other bytes of modifying region. > > > > 4. Modify the first byte of modifying region, and synchronize code on > > all CPUs. > > > > 5. Clear int3 handler. > > > > If a suitable int3 handler is left permanently in place then the > > synchronization in step 4 is unnecessary. > > > > Correct.
Right, above sequence would work on AMD. -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/