On Tue, Aug 06, 2013 at 07:00:17PM +0100, Julius Werner wrote:
> This patch simplifies the way the phy-samsung-usb code finds the correct
> power management register to enable PHY clock gating. Previously, the
> code would calculate the register address from a device tree supplied
> base address and add an offset based on the PHY type.
>
> Since every PHY has its own device tree entry and needs only one
> register, we can just encode the address itself in the device tree and
> remove the diffentiation in the code. The bitmask needed to specify the
> bit within that register stays in place, allowing support for platforms
> like s3c64xx that use different bits within the same register.
This breaks compatibility, both for an old kernel and a new dt and a new
kernel with an old dt. Is anyone using these bindings?
>
> Signed-off-by: Julius Werner <jwer...@chromium.org>
> ---
> .../devicetree/bindings/usb/samsung-usbphy.txt | 26
> +++++-----------------
> arch/arm/boot/dts/exynos5250.dtsi | 4 ++--
> drivers/usb/phy/phy-samsung-usb.c | 18 ++++-----------
> drivers/usb/phy/phy-samsung-usb.h | 23 +++++--------------
> drivers/usb/phy/phy-samsung-usb2.c | 11 ++++-----
> drivers/usb/phy/phy-samsung-usb3.c | 2 +-
> 6 files changed, 22 insertions(+), 62 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> index 33fd354..1cf9b68 100644
> --- a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt
> @@ -34,14 +34,7 @@ Optional properties:
> - The child node 'usbphy-sys' to the node 'usbphy' is for the system
> controller
> interface for usb-phy. It should provide the following information
> required by
> usb-phy controller to control phy.
> - - reg : base physical address of PHY_CONTROL registers.
> - The size of this register is the total sum of size of all PHY_CONTROL
> - registers that the SoC has. For example, the size will be
> - '0x4' in case we have only one PHY_CONTROL register (e.g.
> - OTHERS register in S3C64XX or USB_PHY_CONTROL register in S5PV210)
> - and, '0x8' in case we have two PHY_CONTROL registers (e.g.
> - USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers in exynos4x).
> - and so on.
> + - reg : address of PHY_CONTROL register for this PHY.
>
> Example:
> - Exynos4210
> @@ -57,8 +50,8 @@ Example:
> clock-names = "xusbxti", "otg";
>
> usbphy-sys {
> - /* USB device and host PHY_CONTROL registers */
> - reg = <0x10020704 0x8>;
> + /* USB device PHY_CONTROL register */
> + reg = <0x10020704 0x4>;
> };
> };
>
Why are we describing fewer registers now? Are they described elsewhere?
The dt should describe the device, not only the portion of it Linux
wants to use right now.
Thanks,
Mark.
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