* David Laight <david.lai...@aculab.com> wrote:
> > > I'm not sure, whats the typical capacity for the branch predictors
> > > ability to remember code paths?
> ...
> >
> > For such simple single-target branches it goes near or over a thousand
> > for recent Intel and AMD microarchitectures. Thousands for really
> > recent CPUs.
>
> IIRC the x86 can also correctly predict simple sequences - like a branch
> in a loop that is taken every other iteration, or only after a previous
> branch is taken.
They tend to be rather capable but not very well documented :) With a
large out of order execution design and 20+ pipeline stages x86 branch
prediction accuracy is perhaps the most important design aspect to good
CPU performance.
> Much simpler cpus may use a much simpler strategy.
Yeah. The patches in this thread are about the x86 assembly implementation
of the csum routines, and for 'typical' x86 CPUs the branch prediction
units and caches are certainly sophisticated enough.
Also note that here, for real usecases, the csum routines are (or should
be) memory bandwidth limited, missing the data cache most of the time,
with a partially idling pipeline, while branch prediction accuracy matters
most when the pipeline is well fed and there are a lot of instructions in
flight.
Thanks,
Ingo
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