On Wed, Nov 27, 2013 at 03:20:07PM -0800, H. Peter Anvin wrote: > No. MFENCE doesn't serialize the front end.
So my manual says "The MFENCE instruction is weakly-ordered with respect to data and instruction prefetches. Speculative loads initiated by the processor, or specified explicitly using cache-prefetch instructions, can be reordered around an MFENCE." and the SDM has only one sentence stating "MFENCE does not serialize the instruction stream." which I'm assuming means the same, i.e. MFENCE doesn't have control on I$ prefetches and they can be reordered around it. But I'd guess that depends on the uarch because Bulldozer, reportedly, implements MFENCE by causing a pipeline stall which controls the prefetches too: "[MFENCE] stalls the pipeline and the processor core cannot begin processing any further instructions until all previous instructions are completed and any outstanding memory operations (such as prefetches and stores) have completed. (This stall applies only to the individual integer unit of the compute unit where the MFENCE instruction is executed.) Architecturally serializing instructions such as CPUID have the same pipeline stall behavior as MFENCE." It is not clear, though, whether with "memory operations" and "prefetches" they mean I$ prefetches too. Cool, one gets to learn new stuff every day so thanks for making me look :-) -- Regards/Gruss, Boris. Sent from a fat crate under my desk. Formatting is fine. -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/