Il 21/03/2014 20:09, H. Peter Anvin ha scritto:
Calling this a bug in the PMU code is ridiculous. If KVM tells the system it os a specific vendor-family-model-stepping but diverges in behavior then it, by definition, is broken.
Yeah, this is true. On AMD there is processor support for virtualizing LBR, but Intel doesn't have it. I'm not sure if generic load/save MSR support could be used to do it.
Unfortunately, LBR does not have any CPUID bit to show its presence, unlike a lot of other perf-related features. So, even though calling it a bug in perf code is an exaggeration, using rdmsr_safe makes sense.
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