* Roger Quadros <rog...@ti.com> [140808 07:29]: > commit 65b97cf6b8de introduced in v3.7 caused a regression > by using a reversed CS_MASK thus causing omap_calculate_ecc to > always fail. As the NAND base driver never checks for .calculate()'s > return value, the zeroed ECC values are used as is without showing > any error to the user. However, this won't work and the NAND device > won't be guarded by any error code. > > Fix the issue by using the correct mask. > > Code was tested on omap3beagle using the following procedure > - flash the primary bootloader (MLO) from the kernel to the first > NAND partition using nandwrite. > - boot the board from NAND. This utilizes OMAP ROM loader that > relies on 1-bit Hamming code ECC. > > Fixes: 65b97cf6b8de (mtd: nand: omap2: handle nand on gpmc) > > Cc: <sta...@vger.kernel.org> [3.7+] > Signed-off-by: Roger Quadros <rog...@ti.com>
I'll apply this into omap-for-v3.17/fixes thanks. Regards, Tony > --- > drivers/mtd/nand/omap2.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c > index f0ed92e..e2b9b34 100644 > --- a/drivers/mtd/nand/omap2.c > +++ b/drivers/mtd/nand/omap2.c > @@ -931,7 +931,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const > u_char *dat, > u32 val; > > val = readl(info->reg.gpmc_ecc_config); > - if (((val >> ECC_CONFIG_CS_SHIFT) & ~CS_MASK) != info->gpmc_cs) > + if (((val >> ECC_CONFIG_CS_SHIFT) & CS_MASK) != info->gpmc_cs) > return -EINVAL; > > /* read ecc result */ > -- > 1.8.3.2 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
