On Fri, 5 Sep 2014, Andrew Bresticker wrote:
> Instead of using GIC interrupt 0 for the timer (which was not even
> handled correctly by the GIC irqchip code and could conflict with an
> actual external interrupt), use the designated local interrupt for
> the GIC timer.
>
> Also, since the timer is a per-CPU interrupt, initialize it with
> setup_percpu_irq() and enable it with enable_percpu_irq() instead
> of using direct register writes.
>
> Signed-off-by: Andrew Bresticker <abres...@chromium.org>
> ---
> No changes from v1.
> ---
> arch/mips/kernel/cevt-gic.c | 16 +++++++---------
> 1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c
> index 6093716..cae72a4 100644
> --- a/arch/mips/kernel/cevt-gic.c
> +++ b/arch/mips/kernel/cevt-gic.c
> @@ -68,7 +68,7 @@ int gic_clockevent_init(void)
> if (!cpu_has_counter || !gic_frequency)
> return -ENXIO;
>
> - irq = MIPS_GIC_IRQ_BASE;
> + irq = MIPS_GIC_LOCAL_IRQ_BASE + GIC_LOCAL_INTR_COMPARE;
>
> cd = &per_cpu(gic_clockevent_device, cpu);
>
> @@ -91,15 +91,13 @@ int gic_clockevent_init(void)
>
> clockevents_register_device(cd);
>
> - GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_MAP), 0x80000002);
> - GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_SMASK), GIC_VPE_SMASK_CMP_MSK);
> + if (!gic_timer_irq_installed) {
> + setup_percpu_irq(irq, &gic_compare_irqaction);
> + irq_set_handler(irq, handle_percpu_irq);
> + gic_timer_irq_installed = 1;
> + }
>
> - if (gic_timer_irq_installed)
> - return 0;
> + enable_percpu_irq(irq, 0);
Please use a proper IRQ_TYPE constant instead of 0
Thanks,
tglx
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