On Thursday, September 25, 2014 at 08:20:35 AM, bpqw wrote:
> For Micron spi norflash,you can enable Quad spi transfer
> by clear EVCR(Enhanced Volatile Configuration Register)
> Quad I/O protocol bit.
>
> Signed-off-by: bean huo <bean...@micron.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 45
> +++++++++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h |
> 6 ++++++
> 2 files changed, 51 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index b5ad6be..e72894f 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -878,6 +878,44 @@ static int spansion_quad_enable(struct spi_nor *nor)
> return 0;
> }
>
> +static int micron_quad_enable(struct spi_nor *nor)
> +{
> + int ret, val;
> +
> + ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1);
> + if (ret < 0) {
> + dev_err(nor->dev, "error %d reading EVCR\n", ret);
> + return -EINVAL;
> + }
> +
> + write_enable(nor);
> +
> + /* set EVCR ,enable quad I/O */
> + nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON;
> + ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0);
> + if (ret < 0) {
> + dev_err(nor->dev,
> + "error while writing EVCR register\n");
> + return -EINVAL;
> + }
> +
> + if (wait_till_ready(nor))
> + return 1;
Why does this not return proper error code or even better, return value from
wait_till_ready() ?
Other than that, there's nothing wrong with the patch I think.
Best regards,
Marek Vasut
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