* Bryan O'Donoghue <pure.lo...@nexus-software.ie> wrote:
> >>I'd have mentioned "erratum" there, otherwise people won't understand why
> >>the PGE bit being set would be a problem in the first place.
> >>
> >>Something like:
> >>
> >>/*
> >> * Locate the page directory and flush the TLB.
> >> *
> >> * On Quark X1000 CPUs we still have the PGE bit incorrectly set
> >> * due to a processor erratum, so __flush_tlb_all() is not yet
> >> * doing what it says. Fortunately we have a cr3 flush here,
> >> * which is what is needed in this processor to flush TLBs, so
> >> * there's no need to add a Quark X1000 quirk here.
> >> */
> >
> >Yeah.
> >
> >I'd also add the fact that it's an unintended erratum to the
> >Quark quirk section of early_init_intel() as well.
>
> OK.
>
> How about.
>
> /*
> * Locate the page directory and flush the TLB.
> *
> * On Quark X1000 CPUs we still have the PGE bit incorrectly set
> * due to a processor erratum, so __flush_tlb_all() is not yet
> * doing what it says. Fortunately we have a cr3 flush here,
> * which is what is needed in this processor to flush TLBs, so
> * there's no need to add a Quark X1000 quirk here.
> *
> * early_init_intel will unset the X86_FEATURE_PGE flag later
> * and __flush_tlb_all() will flush via cr3
> */
Sounds good.
Thanks,
Ingo
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