On Wed, Oct 15, 2014 at 3:08 PM, Patrick Palka <patr...@parcs.ath.cx> wrote:
> On Wed, Oct 15, 2014 at 9:41 AM, Patrick Palka <patr...@parcs.ath.cx> wrote:
>> Instead of open-coding the equivalent cmpxchg loop we can just use
>> atomic_set_mask and atomic_clear_mask to atomically OR or AND
>> the value in &buffer->record_disabled.
>>
>> Cc: Steven Rostedt <rost...@goodmis.org>
>> Cc: Ingo Molnar <mi...@redhat.com>
>> Signed-off-by: Patrick Palka <patr...@parcs.ath.cx>
>> ---
>>
>> NB: I have only tested this patch on x86_64 by booting with
>> CONFIG_RING_BUFFER_STARTUP_TEST=y.
>>
>> kernel/trace/ring_buffer.c | 16 ++--------------
>> 1 file changed, 2 insertions(+), 14 deletions(-)
>>
>> diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
>> index 2d75c94..e15ce2a 100644
>> --- a/kernel/trace/ring_buffer.c
>> +++ b/kernel/trace/ring_buffer.c
>> @@ -3050,13 +3050,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_enable);
>> */
>> void ring_buffer_record_off(struct ring_buffer *buffer)
>> {
>> - unsigned int rd;
>> - unsigned int new_rd;
>> -
>> - do {
>> - rd = atomic_read(&buffer->record_disabled);
>> - new_rd = rd | RB_BUFFER_OFF;
>> - } while (atomic_cmpxchg(&buffer->record_disabled, rd, new_rd) != rd);
>> + atomic_set_mask(RB_BUFFER_OFF, &buffer->record_disabled);
>> }
>> EXPORT_SYMBOL_GPL(ring_buffer_record_off);
>>
>> @@ -3073,13 +3067,7 @@ EXPORT_SYMBOL_GPL(ring_buffer_record_off);
>> */
>> void ring_buffer_record_on(struct ring_buffer *buffer)
>> {
>> - unsigned int rd;
>> - unsigned int new_rd;
>> -
>> - do {
>> - rd = atomic_read(&buffer->record_disabled);
>> - new_rd = rd & ~RB_BUFFER_OFF;
>> - } while (atomic_cmpxchg(&buffer->record_disabled, rd, new_rd) != rd);
>> + atomic_clear_mask(RB_BUFFER_OFF, &buffer->record_disabled);
>> }
>> EXPORT_SYMBOL_GPL(ring_buffer_record_on);
>>
>> --
>> 2.1.2.443.g670a3c1
>>
>
> It just occurred to me that atomic_clear_mask and atomic_set_mask
> expect to take an int *, not an atomic_t *, so this patch is bogus...
> Sorry for the noise.
Uh, actually, the generic implementations of these functions (defined
in include/asm-generic/atomic.h) _do_ take an atomic_t *. It's the
specialized x86 definitions of these functions (defined in
arch/x86/include/asm/atomic.h) that take (expect) an int *. So this
patch is not bogus; the x86 specializations for atomic_clear_mask and
atomic_set_mask are. I will try to fix this in a separate patch.
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