>I have almost verified all the micros parts for operating quad mode and the >quad enable bit is >volatile by default and no need to set it on software.
>Why this code is meant for - does micron has changed this bit operation on >newly added parts? >thanks! >-- >Jagan. For Micron Spi norflash,if you want to make it work Quad I/O mode,you can do it by set Two registers,Nonvolatile Configuration resister(NVCR) and Enhanced volatile confuration register(EVCR), but according to spi-nor.c,and micron spi nor,we recommend that if want to enable Micron spi nor Quad I/O mode,the best way is to set EVCR. Of course,you can use Quad/Dual operation command to read/write Micron spi nor in the spi nor Extended I/O mode. But their command-address-data is different. The purpose of this patch is only to enable Micron spi nor Quad I/O mode,if want to make Micron spi nor work Under Quad I/O mode. Hi,Brian How about this patch?Please give me some tips,thanks. N�����r��y����b�X��ǧv�^�){.n�+����{����zX����ܨ}���Ơz�&j:+v�������zZ+��+zf���h���~����i���z��w���?�����&�)ߢf��^jǫy�m��@A�a��� 0��h���i