On piÄ…, 2015-01-23 at 17:24 +0100, Bartlomiej Zolnierkiewicz wrote:
> Commit c2dd114d2486 ("ARM: EXYNOS: fix register setup for AFTR mode
> code") added S5P_CENTRAL_SEQ_OPTION register setup fix for all
> Exynos SoCs to AFTR mode code-path.  It turned out that for coupled
> cpuidle AFTR mode on Exynos4210 (added by the next patch) applying
> this fix causes lockup so enable it in the AFTR mode code-path only
> on SoCs that require it (in the suspend code-path it can be always
> applied like it was before commit c2dd114d2486).
> 
> Cc: Daniel Lezcano <daniel.lezc...@linaro.org>
> Cc: Colin Cross <ccr...@google.com>
> Cc: Kukjin Kim <kgene....@samsung.com>
> Cc: Krzysztof Kozlowski <k.kozlow...@samsung.com>
> Cc: Tomasz Figa <tomasz.f...@gmail.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnier...@samsung.com>
> Acked-by: Kyungmin Park <kyungmin.p...@samsung.com>
> ---
>  arch/arm/mach-exynos/pm.c      | 11 +++++++----
>  arch/arm/mach-exynos/suspend.c |  4 ++++
>  2 files changed, 11 insertions(+), 4 deletions(-)

Looks good.

Reviewed-by: Krzysztof Kozlowski <k.kozlow...@samsung.com>

Best regards,
Krzysztof

> 
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index dfc8594..1a7454d 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -98,10 +98,6 @@ void exynos_pm_central_suspend(void)
>       tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
>       tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
>       pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
> -
> -     /* Setting SEQ_OPTION register */
> -     pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
> -                    S5P_CENTRAL_SEQ_OPTION);
>  }
>  
>  int exynos_pm_central_resume(void)
> @@ -165,6 +161,13 @@ void exynos_enter_aftr(void)
>  
>       exynos_pm_central_suspend();
>  
> +     if (of_machine_is_compatible("samsung,exynos4212") ||
> +         of_machine_is_compatible("samsung,exynos4412")) {
> +             /* Setting SEQ_OPTION register */
> +             pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
> +                            S5P_CENTRAL_SEQ_OPTION);
> +     }
> +
>       cpu_suspend(0, exynos_aftr_finisher);
>  
>       if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
> diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
> index 82e6b6f..666ec3e 100644
> --- a/arch/arm/mach-exynos/suspend.c
> +++ b/arch/arm/mach-exynos/suspend.c
> @@ -319,6 +319,10 @@ static int exynos_pm_suspend(void)
>  {
>       exynos_pm_central_suspend();
>  
> +     /* Setting SEQ_OPTION register */
> +     pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
> +                    S5P_CENTRAL_SEQ_OPTION);
> +
>       if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
>               exynos_cpu_save_register();
>  

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