On 15 May 2015 at 17:16, Alex Bennée <[email protected]> wrote: > Mark Rutland <[email protected]> writes: >> This gets more fun when you consider the context-aware breakpoints are >> the highest numbered. So the set of (context-aware) breakpoints might >> not intersect across all CPUs. > > I didn't see a reference to that in the ARM ARM. It seemed to imply any > breakpoint could be context aware is .BT was appropriately set and > linked to the VR.
No; see D2.9.2; there must be at least one context-aware breakpoint, but no requirement for more than that. -- PMM -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
