From: dashsriram <dash.sri...@gmail.com>
Fixed a typo error in the file
Signed-off-by: Sriram Dash <dash.sri...@gmail.com>
---
drivers/base/regmap/regmap.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 6273ff0..316d3d7 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -983,9 +983,9 @@ EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
/**
* devm_regmap_field_free(): Free register field allocated using
- * devm_regmap_field_alloc. Usally drivers need not call this function,
+ * devm_regmap_field_alloc. Usually drivers need not call this function,
* as the memory allocated via devm will be freed as per device-driver
- * life-cyle.
+ * life-cycle.
*
* @dev: Device that will be interacted with
* @field: regmap field which should be freed.
@@ -1741,7 +1741,7 @@ EXPORT_SYMBOL_GPL(regmap_bulk_write);
*
* the (register,newvalue) pairs in regs have not been formatted, but
* they are all in the same page and have been changed to being page
- * relative. The page register has been written if that was neccessary.
+ * relative. The page register has been written if that was necessary.
*/
static int _regmap_raw_multi_reg_write(struct regmap *map,
const struct reg_default *regs,
@@ -1809,7 +1809,7 @@ static int _regmap_range_multi_paged_reg_write(struct
regmap *map,
struct reg_default *base;
unsigned int this_page = 0;
/*
- * the set of registers are not neccessarily in order, but
+ * the set of registers are not necessarily in order, but
* since the order of write must be preserved this algorithm
* chops the set each time the page changes
*/
@@ -1922,7 +1922,7 @@ static int _regmap_multi_reg_write(struct regmap *map,
* @num_regs: Number of registers to write
*
* The 'normal' block write mode will send ultimately send data on the
- * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
+ * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
* addressed. However, this alternative block multi write mode will send
* the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
* must of course support the mode.
@@ -2001,7 +2001,7 @@ EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
* If supported by the underlying bus the write will be scheduled
* asynchronously, helping maximise I/O speed on higher speed buses
* like SPI. regmap_async_complete() can be called to ensure that all
- * asynchrnous writes have been completed.
+ * asynchronous writes have been completed.
*
* A value of zero will be returned on success, a negative errno will
* be returned in error cases.
--
2.4.1
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