On Fri, Jul 17, 2015 at 12:15:35PM +0200, Peter Zijlstra wrote:
> On Fri, Jul 17, 2015 at 10:32:21AM +0100, Will Deacon wrote:
> > @@ -158,9 +140,7 @@ void arch_spin_lock_flags(arch_spinlock_t *lock,
> > unsigned long flags)
> >
> > static inline void arch_spin_unlock(arch_spinlock_t *lock)
> > {
> > - SYNC_IO;
> > - __asm__ __volatile__("# arch_spin_unlock\n\t"
> > - PPC_RELEASE_BARRIER: : :"memory");
> > + smp_mb();
> > lock->slock = 0;
> > }
>
> Should we then also make smp_store_release() use sync instead of lwsync
> to keep it consistent?
Unless smp_store_release() needs to interact with MMIO accesses, it
should still be able to be lwsync. This means that unlock-lock is a full
barrier, but relase-acquire is not necessarily, which should be just fine.
Thanx, Paul
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