On Sat, Jul 18, 2015 at 11:30 AM, Max Filippov <[email protected]> wrote:
> In case perf IRQ is the highest of the medium-level IRQs, and is alone
> on its level, it may be treated as NMI:
> - LOCKLEVEL is defined to be one level less than EXCM level,
> - IRQ masking never lowers current IRQ level,
> - new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that
>   IRQ; new second level exception handler, do_nmi, assigned to it
>   handles it as NMI,
> - atomic operations in configurations without s32c1i still need to mask
>   all interrupts.
>
> Cc: Peter Zijlstra <[email protected]>
> Signed-off-by: Max Filippov <[email protected]>
> ---
>  arch/xtensa/include/asm/atomic.h    | 10 ++--
>  arch/xtensa/include/asm/cmpxchg.h   |  4 +-
>  arch/xtensa/include/asm/irqflags.h  | 22 ++++++++-
>  arch/xtensa/include/asm/processor.h | 31 ++++++++++++-
>  arch/xtensa/kernel/entry.S          | 93 
> +++++++++++++++++++++++++++++++------
>  arch/xtensa/kernel/irq.c            |  8 ++++
>  arch/xtensa/kernel/perf_event.c     |  6 ++-
>  arch/xtensa/kernel/traps.c          | 26 +++++++++++
>  arch/xtensa/kernel/vectors.S        | 10 +++-
>  9 files changed, 183 insertions(+), 27 deletions(-)

Ping?

-- 
Thanks.
-- Max
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