On Thu, Aug 06, 2015 at 04:46:32PM -0300, Arnaldo Carvalho de Melo wrote: > Em Sat, Jul 18, 2015 at 11:30:10AM +0300, Max Filippov escreveu: > > Xtensa Performance Monitor Module has up to 8 32 bit wide performance > > counters. Each counter may be enabled independently and can count any > > single type of hardware performance events. Event counting may be enabled > > and disabled globally (per PMM). > > Each counter has status register with bits indicating if the counter has > > been overflown and may be programmed to raise profiling IRQ on overflow. > > This IRQ is used to rewind counters and allow for counting more than 2^32 > > samples for counting events and to report samples for sampling events. > > > > For more details see Tensilica Debug User's Guide, chapter 8 > > "Performance monitor module". > > Has this gone via PeterZ? I added the tools/ bits in my perf/core > branch, will go in next pull req,
I was thinking it would go through the xtensa tree. Looks fine at a quick glance and they can actually test it. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
