This patch annotates a few x86-specific error paths with perf's extended
error reporting facility.
Signed-off-by: Alexander Shishkin <alexander.shish...@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event.c | 8 ++++++--
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 2 +-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index f56cf074d0..b3b531beee 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -12,6 +12,8 @@
* For licencing details see kernel-base/COPYING
*/
+#define PERF_MODNAME "perf/x86"
+
#include <linux/perf_event.h>
#include <linux/capability.h>
#include <linux/notifier.h>
@@ -426,11 +428,13 @@ int x86_setup_perfctr(struct perf_event *event)
/* BTS is currently only allowed for user-mode. */
if (!attr->exclude_kernel)
- return -EOPNOTSUPP;
+ return perf_err(-EOPNOTSUPP,
+ "BTS sampling not allowed for kernel
space");
/* disallow bts if conflicting events are present */
if (x86_add_exclusive(x86_lbr_exclusive_lbr))
- return -EBUSY;
+ return perf_err(-EBUSY,
+ "LBR conflicts with active events");
event->destroy = hw_perf_lbr_event_destroy;
}
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index b2c9475b7f..222b259c5e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -607,7 +607,7 @@ int intel_pmu_setup_lbr_filter(struct perf_event *event)
* no LBR on this PMU
*/
if (!x86_pmu.lbr_nr)
- return -EOPNOTSUPP;
+ return perf_err(-EOPNOTSUPP, "LBR is not supported by this
cpu");
/*
* setup SW LBR filter
--
2.5.0
--
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