Robert Jarzmik <robert.jarz...@free.fr> writes: > After the conversion of pxa architecture to common clock framework, the > NAND clock can be disabled on driver exit. > > In this case, it happens that if the driver used the NAND and set the > DFI arbitration bit, the next access to a static memory controller area, > such as an ethernet card, will stall the system bus, and the core will > be stalled forever. > > This is especially true on pxa31x SoCs, where the NDCR was augmented > with a new bit to prevent this lockups by giving full ownership of the > DFI arbiter to the SMC, in change SCr#6. > > Fix this by clearing the DFI arbritration bit in driver exit. This > effectively prevents a lockup on zylonite when removing pxa3xx-nand > module, and using ethernet afterwards. > > Signed-off-by: Robert Jarzmik <robert.jarz...@free.fr> Hi Brian,
Are you happy with this patch, and if so could you queue it please ? Cheers. -- Robert -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
