On Thu, Oct 01, 2015 at 08:29:19AM -0400, Jon Ringle wrote: > On Thu, 1 Oct 2015, Mark Brown wrote:
> > This completely bypasses and therefore breaks the cache infrastructure. > Right after sending the v2 patch, I realized that calling the > custom reg_update_bits would only be applicable for registers that are > marked as volatile. Would the following solution be acceptable (it would Well, it should still *work* with a cache, though it's certainly true that it's unlikely to have any performance benefit with cached register since the read part of the read/modify/write cycle is essentially free with the cache. > also simplify the regmap_update_bits in the encx24j600 driver): > if (regmap_volatile(map, reg) && map->reg_update_bits) { > return map->reg_update_bits(map->bus_context, reg, mask, > val, change, force_write); > The cache state should not matter for volatile registers, right? Right. I see you've sent a new patch already, I'll reply to that after I've thought about it a little.
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